What is 74HC138?


This is 3-to-8 line decoder/demultiplexer.

A demultiplexer, also known as a "demux," is a digital circuit that takes a single input signal and directs it to one of several possible outputs. It is essentially the reverse of a multiplexer, which takes multiple inputs and directs them to a single output.


[PDF] Complete Technical Details can be found in the 74HC138 datasheet provided at this page.

Summary in PDF File


74HC138 74HCT138 3 to 8 line decoder demultiplexer inverting Rev 6 28 December 2015 Product data sheet 1 General description The 74HC138 74HCT138 decodes three binary weighted address inputs A0 A1 and A2 to eight mutually exclusive outputs Y0 to Y7 The device features three enable inputs E1 E2 and E3 Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH This multiple enable function allows easy parallel expansion to a 1 of 32 5 to 32 lines decoder with just four 138 ICs and one inverter The 138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes Inputs include clamp diodes This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC 2 Features and benefits Complies with JEDEC standard no 7A Input levels For 74HC138 CMOS level For 74HCT138 TTL level Demultiplexing capability

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[ Detailed Data ]


The basic design of a demultiplexer involves using a set of logic gates to decode the control signals and direct the input signal to the selected output channel. The input signal is usually passed through a series of AND gates, with each gate corresponding to one of the possible output channels. The control signals are used to enable the appropriate AND gate, while the other gates are disabled.

Manufacturers : NXP Semiconductors

NXP - 74HC138 Datasheet PDF

NXP 74HC138 MULTIPLEXER

3-to-8 line decoder/demultiplexer

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Datasheet 74HC138.PDF DownLoad ( NXP )


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