What is 74HC193?


This is Presettable synchronous 4-bit binary up/down counter.

The up/down counter can be thought of as a combination of two counters - one that counts up and another that counts down. The direction of the counting is determined by a control signal that is applied to the counter. When the control signal is high, the counter counts up, and when the control signal is low, the counter counts down.


[PDF] Complete Technical Details can be found in the 74HC193 datasheet provided at this page.

Summary in PDF File


74HC193 74HCT193 Presettable synchronous 4 bit binary up down counter Rev 5 29 January 2016 Product data sheet 1 General description The 74HC193 74HCT193 is a 4 bit synchronous binary up down counter Separate up down clocks CPU and CPD respectively simplify operation The outputs change state synchronously with the LOW to HIGH transition of either clock input If the CPU clock is pulsed while CPD is held HIGH the device will count up If the CPD clock is pulsed while CPU is held HIGH the device will count down Only one clock input can be held HIGH at any time to guarantee predictable behavior The device can be cleared at any time by the asynchronous master reset input MR it may also be loaded in parallel by activating the asynchronous parallel load input PL The terminal count up TCU and terminal count down TCD outputs are normally HIGH When the circuit has reached the maximum count state of 15 the next HIGH to LOW transition of CPU will cause TCU to go LOW TCU will stay LOW until CPU goes HIGH again duplicating the count up clock Likewise the TCD output will go LOW when the circuit is in the zero state and the CPD goes LOW The terminal count outputs can be used as the clock input signals to the next higher order circuit in a

Datasheet Download (PDF)


[ Detailed Data ]


The basic design of an up/down counter involves using a set of flip-flops connected in a specific way. The flip-flops are used to store the current count value, and the input to each flip-flop is derived from the output of the previous flip-flop. When the counter is in the up-counting mode, the flip-flops are connected to a logic circuit that generates a signal to increment the count value by one for each clock pulse. When the counter is in the down-counting mode, the flip-flops are connected to a logic circuit that generates a signal to decrement the count value by one for each clock pulse.

Manufacturers : NXP Semiconductors

NXP - 74HC193 Datasheet PDF

NXP 74HC193 DATA

Presettable synchronous 4-bit binary up/down counter

More Search







Datasheet 74HC193.PDF DownLoad ( NXP )


[ Home ]