74LVC244 – Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-Statetitle

74LVC244 Datasheet PDF learn more.

Part number : 74LVC244

Functions : This is a kind of semiconductor, Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-Statetitle.

Pin arrangement :

Package information :

Manufacturer : NXP

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74LVC244 Datasheet PDF

The texts in the PDF file :

INTEGRATED CIRCUITS 74LVC244A/74LVCH244A Octal buffer/line driver with 5-volt tolerant inputs/outputs (3-State)title Product specification Supersedes data of 1996 Sep 06 IC24 Data Handbook 1998 May 20 Philips Semiconductors Philips Semiconductors Product specification Octal buffer/line driver with 5-volt tolerant inputs/outputs (3-State) 74LVC244A 74LVCH244A FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 2.7V to 3.6V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • Direct interface with TTL levels • High impedance when VCC = 0V • Bushold on all data inputs (74LVCH244A only) DESCRIPTION The 74LVC244A/74LVCH244A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. These features allow the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC244A/74LVCH244A is an octal non-inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. The ’244’ is functionally identical to the ’240’, but the ’240’ has non-inverting outputs. QUICK REFERENCE DATA SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay 1An to 1Yn; 2An to 2Yn Input capacitance Power dissipation capacitance per buffer Notes 1 and 2 CONDITIONS CL = 50pF VCC = 3 3.3V 3V TYPICAL 35 3.5 4.4 22.6 UNIT ns pF pF NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL x VCC2 x fo) = sum [ … ]

74LVC244 PDF File

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